1. Field of the Invention
The present invention relates to a semiconductor device and in particular it can suitably be used for a semiconductor device including a non-volatile memory including a floating gate electrode and a control gate electrode.
2. Description of the Background Art
A semiconductor device including a non-volatile memory having a floating gate electrode represents one of non-volatile memories. In a surface of a semiconductor substrate of such a semiconductor device, a memory cell array region and a gate contact region are defined. In the memory cell array region, a memory cell transistor is arranged. An interlayer insulating film is formed to cover the memory cell transistor. In a portion of the interlayer insulating film located in the gate contact region, a contact plug and a via for electrical connection between a control gate electrode and a word line shunt are formed.
In the memory cell array region, a memory cell transistor is formed in an element formation region defined by an element isolation region. On the other hand, the gate contact region is arranged in the element isolation region (an element isolation insulating film). In the gate contact region, in order to achieve uniform processing accuracy of the floating gate electrode, a dummy floating gate electrode is formed at a pitch in conformity with a pitch of the floating gate electrode formed in the memory cell array region. Here, the dummy floating gate electrode is formed on the element isolation insulating film. Japanese Patent Laying-Open No. 2003-152121 represents one example of documents disclosing a semiconductor device including a non-volatile memory.